Lauri
Koskinen
Docent, Department of Computing
Professor of Practice
Integrated circuits
Links
Areas of expertise
System-on-Chip architecture: Low-power processing
Verification and sign off
Neuromorphic computing / CiM
On-chip security
Mixed-Mode Processing
Audio & Video analysis
Ultra-low-power digital design: Processor architecture / RISC-V
Ultra-low-power digital design: Processor architecture / RISC-V
Sub- and near-threshold design
Library characterization
Semiconductor statistics
R&D Commercialization / IP protection
Semiconductor business development: Patenting
Semiconductor statistics
R&D Commercialization / IP protection
Semiconductor business development: Patenting
Marketing
Power management: Integrated DC-DC converters
Power management: Integrated DC-DC converters
LDOs
Project management / team lead
Project management / team lead
Biography
Wide expertise ranging from ultra-low-power aspects of deep submicron transistors to the high-level realization of various systems (microcontrollers, deep learning, wireless biomedical sensors, audio and video coders).
Proven track record in commercializing R&D
Excellent communication skills.
Wide range of research contacts from IC design to medical expertise.
Considerable skills in innovative project proposal drafting
Teaching
Processor architecture, Digital and mixed-mode IC design, modern EDA design flow
Research
Energy Minimization in small to big systems using both conventional and unconventional methods.
Publications
Extreme Path Delay Estimation of Critical Paths in Within-Die Process Fluctuations Using Multi-Parameter Distributions (2023)
Journal of Low Power Electronics and Applications
(Vertaisarvioitu alkuperäisartikkeli tai data-artikkeli tieteellisessä aikakauslehdessä (A1))
EM Side-Channel Countermeasure for Switched-Capacitor DC-DC Converters Based on Amplitude Modulation (2021)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
(Vertaisarvioitu alkuperäisartikkeli tai data-artikkeli tieteellisessä aikakauslehdessä (A1))
A 0.4-0.9V, 2.87pJ/cycle Near-Threshold ARM Cortex-M3 CPU with In-Situ Monitoring and Adaptive-Logic Scan (2020)
IEEE Symposium on Low-Power and High-Speed Chips and Systems
(Vertaisarvioitu artikkeli konferenssijulkaisussa (A4))
Execution Frequency and Energy Optimization for DVFS-enabled, Near-threshold Processors (2020)
International Conference on Advanced Computer Information Technologies (ACIT)
(Vertaisarvioitu artikkeli konferenssijulkaisussa (A4))
Reconfigurable Switched Capacitor DC-DC Converter for Improved Security in IoT Devices (2018)
International Workshop on Power And Timing Modeling, Optimization and Simulation
(Vertaisarvioitu artikkeli konferenssijulkaisussa (A4))
A 5.3 pJ/op Approximate TTA VLIW Tailored for Machine Learning (2017)
Microelectronics Journal
(Vertaisarvioitu alkuperäisartikkeli tai data-artikkeli tieteellisessä aikakauslehdessä (A1))
Implementing Minimum-Energy-Point Systems With Adaptive Logic (2016)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
(Vertaisarvioitu alkuperäisartikkeli tai data-artikkeli tieteellisessä aikakauslehdessä (A1))
A fully integrated 2:1 self-oscillating switched-capacitor DC-DC converter in 28 nm UTBB FD-SOI (2016)
Journal of Low Power Electronics and Applications
(Vertaisarvioitu alkuperäisartikkeli tai data-artikkeli tieteellisessä aikakauslehdessä (A1))
A Performance Case-Study on Memristive Computing-in-Memory versus Von Neumann Architecture (2016)
Data Compression Conference
(O2 Muu julkaisu )
A Fully Integrated Self-Oscillating Switched-Capacitor DC-DC Converter for Near-Threshold Loads (2015)
IEEE Asian Solid-State Circuits Conference (A-SSCC)
(Vertaisarvioitu artikkeli konferenssijulkaisussa (A4))